ECE8223 Exercise ES5: Sourcecoupled pair version 1.6
ES5 One of the workhorse subcircuits of analog IC design is the of the SourceCoupled Pair (SCP), as represented by figure ES5.1
Figure ES5.1. nMOS sourcecoupled pair (SCP) topologies
The smallsignal transfer characteristics of an amplifier are
(1) transfer gain A_{VO} = v_{O}/v_{I}
(2) input resistance R_{in}_{ }= v_{I}/i_{I} and
(3) output resistance R_{out}= v_{O}/i_{O}.
For MOS devices since the input is to a V(gate) capacitance. For the passiveload topologies R_{out} = R_{dx} and
(ES5.1)
And for the active load topologies
(ES5.2a)
(ES5.2b)
for which and for the level1 analyses and we might expect them to be mildly inadequate. As a mild analytical upgrade, the values of g_{m} and g_{DS} were be modified in exercises ES2 to firstorder curvefit forms:
(ES5.3a)
(ES5.3b)
For this circuit you should sweep V3 from –0.5V to 0.5V and step the current setting Ix through a reasonable range, such as 25uA to 300uA, step 5uA. This should result in a family of curves for transfer gain. (Figure ES4.2a). A “performance analysis” plot of the Max(dVo1/dVin) and Max(dV02/dVin) are illustrated by figure EC52
Figure ES5.2a Transfer gain, SCP Figure ES5.2b Excel Comparisons:
pSPICE dVo/dVin vs analytical dVo/dVin
The analytical Excel/pSPICE comparisons make use of formulae (ES5.1) and (ES5.2)
Now import your pSPICE data for dVo/dVin vs Ix (figure ES4.2b) into the (Excel) spreadsheet and compare to the analytical results of using equations (ES5.1) and (ES52). If the fit parameters for g_{m} and g_{DS} were reasonablywell adjusted then the comparisons should be fairly close, as represented by figure ES5.2b..
Requirement:

Using this discussion as a template, repeat this analysis but for MOSIS process VO1V. You should have three figures, which you should label as your figures ES5.1, ES5.2a, ES5.2b. The template indicates all of the necessary constructs. The execution does rely on you having accomplished an expertise with the pSPICE and Excel utilities through the previous exercises.

Repeat part (a) but for the circuit of figure ES5.4 (inverted version of figure ES5.1). Change figure numbers appropriately.
Figure ES5.4: SCP with pMOS drivers and nMOS active load 